Diodes ZXLD1362 User Manual download pdf (Page 22)

ZXLD1362

Document number: DS33472 Rev. 5 - 2

22 of 24

www.diodes.com

May 2012

Product Line o

Diodes Incorporated

Application Information (cont.)

ADJ Pin

The ADJ pin is a high impedance input for voltages up to 1.35V

so, when left floating, PCB tracks to this pin should be as short as

possible to reduce noise pickup. A 100nF capacitor from the ADJ

pin to ground will reduce frequency modulation of the output

under these conditions. An additional series 3.3k resistor can

also be used when driving the ADJ pin from an external circuit

(see below). This resistor will provide filtering for low frequency

noise and provide protection against high voltage transients.

High Voltage Tracks

Avoid running any high voltage tracks close to the ADJ pin, to

reduce the risk of leakage currents due to board contamination.

The ADJ pin is soft-clamped for voltages above 1.35V to

desensitize it to leakage that might raise the ADJ pin voltage and

cause excessive output current. However, a ground ring placed

around the ADJ pin is recommended to minimize changes in

output current under these conditions.

Evaluation PCB

ZXLD1362 evaluation boards are available on request and

provide quick testing of the ZXLD1362 device.

Dimming Output Current Using PWM

Low Frequency PWM Mode

When the ADJ pin is driven with a low frequency PWM signal

(eg 100Hz), with a high level voltage V

ADJ

and a low level of

zero, the output of the internal low pass filter will swing

between 0V and V

ADJ

, causing the input to the shutdown circuit

to fall below its turn-off threshold (200mV nom) when the ADJ

pin is low. This will cause the output current to be switched on

and off at the PWM frequency, resulting in an average output

current I

OUTavg

proportional to the PWM duty cycle.

(See Figure 4 - Low frequency PWM operating waveforms).

Figure 4. Low Frequency PWM Operating Waveforms

The average value of output current in this mode is given by:

OUTavg

= 0.1D

PWM

[for D

PWM

>0.001]

This mode is preferable if optimum LED 'whiteness' is required.

It will also provide the widest possible dimming range (approx.

1000:1) and higher efficiency at the expense of greater output

ripple.

GND

ZXLD1362

ADJ

3.3k

100nF

GND

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